DVCon U.S. 2025: Advancements in Design & Verification Methodologies
DVCon U.S. 2025, the premier conference for design and verification professionals, returns to San Jose, California, from February 24 – 27, 2025. Hosted at the DoubleTree by Hilton, the agenda will feature in-depth technical sessions, keynotes and panels, showcasing the latest advancements in verification methodologies, hardware design, low-power design and power optimization strategies. With a strong focus on chip design and the role of AI and ML in verification, attendees will be exploring how these ever-evolving technologies are transforming traditional processes.
Conference Highlights: Pioneering Ideas, Emerging trends & Advanced Verification Methodologies
- Technical Program: The agenda includes tutorials, workshops and peer-reviewed papers covering SystemVerilog, UVM, formal verification and emerging verification techniques
- Panel: Verification experts from across the industry will address the critical question; “Are AI Chips Harder to Verify”. They will discuss coverage metrics, verification reuse, system-level aspects and the potential for AI-assisted approaches
- Keynote Sessions: Industry leaders will discuss emerging EDA trends, advanced methodologies and ai-driven innovation challenges across the electronics landscape.
Expand your Knowledge with Workshops & Tutorials
DVCon U.S. isn’t just about keynotes or panels, it’s also an opportunity for hands-on learning and valuable knowledge exchange. The conference features in-depth workshops and tutorials on verification methodologies, hardware design, low-power design and emerging industry standards. Whether you’re exploring UVM best practices, formal verification strategies or AI’s role in design validation, the hands-on sessions will provide valuable, applicable knowledge.
Exploring the Future of Design & Verification at DVCon
DVCon U.S. continues to be a driving force in the evolution of verification methodologies. As chip designs grow in complexity and more challenges emerge, the conference provides a critical forum for engineers to explore best practices, automation techniques and new verification frameworks that enhance efficiency and reliability. Engineers, researchers and industry professionals looking to stay at the forefront of innovation in design and verification are encouraged to attend.
For more details, visit the official DVCon U.S. website.